Research presentations
Number of the published data : 190
No. Subject of presentation Conference title (Medium,e.g. presentation pamphlet) Presentation date
1 Reactant Minimization for Multi-Target Sample Preparation on Digital Microfluidic qq Biochips using Network Flow Models
Proc. of International Symposium on VLSI Design, Automation & Test (VLSI-DAT), D6-1, Apr. 2019 (Best Paper Candidate)
04/2019
2 Reducing the Overhead of Stochastic Number Generators Without Increasing Error
in the Proceedings of 32th International Conference on VLSI Design, pp. 52-57, Jan. 2019
01/2019
3 演算誤差と回路面積のトレードオフを考慮したStochastic Numberの生成手法,
電子情報通信学会技術研究報告, VLD2018-47
11/2018
4 NLoCの自動設計手法と最適な構造の提案
電子情報通信学会技術研究報告, VLD2018-40
11/2018
5 Mapping to 2D Nearest Neighbor Architecture by a SAT solver and A* algorithm
in Proc. of AQIS 2018, p. 72, Sep. 2018.
09/2018
6 Exact and Approximate Exact Synthesis of Nearest Neighbor Compliant Quantum Circuits in 2-D architectures
in Proc. of AQIS 2018, p. 91, Sep. 2018.
09/2018
7 Compaction of Topological Quantum Circuits by Modularization
in Proc. of AQIS 2018, p. 73, Sep. 2018.
09/2018
8 Quantum Circuit Optimization by Changing the Gate Order for 2D Nearest Neighbor Architectures
Lecture Notes in Computer Science Volume 11106, 2018, pp. 228-243 (Reversible computation 2018, Sep. 2018.)
09/2018
9 整数計画ソルバーを⽤いたNetworked Labs-on-Chipの設計⼿法
2018 年度情報処理学会関西支部大会, A-03 (推薦論文に選出)
09/2018
10 SCの定数⽣成におけるエラー率を考慮した⾯積コスト削減⼿法
2018 年度情報処理学会関西支部大会, A-02
09/2018
11 Approximate Computingを利⽤した配列型乗算器の遅延故 障への対処法
2018 年度情報処理学会関西支部大会, A-01
09/2018
12 Placement of Reagents on Programmable Microfluidic Device
Proc. Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI), R2-1, March 2018. (Outstanding Paper Award)
03/2018
13 On Optimization Methods for Decision Diagrams to Represent Probabilities
Proc. Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI), R2-3, March 2018.
03/2018
14 Systematic Design of Approximate Array Multipliers with Different Accuracy
In International Workshop on Highly Efficient Neural Networks Design, 2017 (ポスター、査読あり)
10/20/2017
15 Locating Loops for TCSC Considering Bridge Transformation
in Proc. of AQIS 2017, pp .425-426, Sep. 2017.
09/05/2017
16 Quantum Circuit Design by Using ESOP Minimization
in Proc. of AQIS 2017, pp. 423-424, Sep. 2017.
09/05/2017
17 Synthesis of Physical-Limitation-Aware Optimal Quantum Circuits in 2-D Architecture
in Proc. of AQIS 2017, pp. 298-299, Sep. 2017.
09/05/2017
18 An Ancilla Reduction Technique for Quantum Circuits Converted from NAND-based Circuits
in Proc. of AQIS 2017, pp. 289-290, Sep. 2017
09/05/2017
19 改良型配列型近似乗算器の設計と解析 
回路とシステムワークショップ
05/11/2017
20 試料生成における汚染問題を考慮したDMFB合成手法
ETNET2017 (21)
03/09/2017
21 Stochastic Computingにおけるマルチプレクサの制御入力として複雑な式を用いる回路設計
ETNET2017 (20)
03/09/2017
22 Stochastic Computingにおける相関の許容によるSNGの削減
ETNET2017 (19)
03/09/2017
23 A Decision Diagram to Analyze Probabilistic Behavior of Circuits
Proc. Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI), R2-6, Oct. 2016.
10/2016
24 Optimization of Quantum Circuits with Multiple Outputs
Proc. of AQIS 2016, pp. 188-189.
08/2016
25 Parallelization of Braiding Operations for Topological Quantum Computation
Proc. of AQIS 2016, pp. 190 -191.
08/2016
26 Reducing Loops for Topological Cluster State Quantum Computation
Proc. of AQIS 2016, pp.208 -209.
08/2016
27 Reduction of Quantum Cost by Changing the Functionality
Proc. of AQIS 2016, pp. 212-213.
08/2016
28 A systematic methodology for design and analysis of approximate array multipliers
2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Jeju, 2016, pp. 352-354.
07/2016
29 A Pre-Optimization Technique to Generate Initial Reversible Circuits with Low Quantum Cost
Proc. of 2016 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2298-3001.
05/2016
30 配列型近似乗算器の設計と解析
回路とシステムワークショップ
05/13/2016
31 Effect of LFSR Seeding, Scrambling and Feedback Polynomial on Stochastic Computing Accuracy
Proc. ACM/IEEE DATE 2016, March, 2016
03/2016
32 Approximate Computing を用いた乗算器の実装および検証
ETNET2016 (35)
03/2016
33 RQFPゲートを用いた超低消費電力AQFP論理回路の設計手法
ETNET2016 (32)
03/2016
34 Partially-Programmable Circuit を 用いた遅延故障の回避手法
ETNET2016 (26)
03/2016
35 Pin-Count Reduction Techniques for Logic Integrated Digital Microfluidic Biochips
in the Proceedings of 29th International Conference on VLSI Design, M/D-1.2, Jan. 2016 (Invited Talk)
01/2016
36 ILP-Based Synthesis for Sample Preparation Applications on Digital Microfluidic Biochips
in the Proceedings of 29th International Conference on VLSI Design, pp. 355-360, Jan. 2016
01/2016
37 Stochastic Number Generation with Few Inputs
in the Proceedings of 29th International Conference on VLSI Design, pp. 128-133, Jan. 2016
01/2016
38 A General Testing Method for Digital Microfluidic Biochips under Physical Constraints
in the Proceedings of IEEE International Test Conference (ITC-2015), pp. 1 - 8, October 2015
10/2015
39 MPMCTゲートの挿入による論理関数を実現する量子回路のコスト削減手法        
2015 年度情報処理学会関西支部大会, A-02 (学生奨励賞 受賞)
09/2015
40 Stochastic Computingに用いる定数を近似する回路の合成手法     
2015 年度情報処理学会関西支部大会, A-01
09/2015
41 Reduction of Computational Steps for Topological Quantum Computation by Inserting SWAP Gates
in Proc. of AQIS 2015, pp. 131-132, Aug. 2015.
08/2015
42 Reordering of Multiple-Control Toffoli gates for Better Decomposition
in Proc. of AQIS 2015, pp. 127-128, Aug. 2015.
08/2015
43 Changing Specification By Adding Multiple-Control Toffoli Gates for Generating a Better Initial Reversible Circuit
in Proc. of AQIS 2015, pp. 123-124, Aug. 2015.
08/2015
44 Reduction of Computational Steps for Topological Quantum
(Invited) Circuits Quantum Programming and Circuits Workshop, June 2015
06/2015
45 Testing of digital microfluidic biochips with arbitrary layouts
in Proc. of 20th IEEE European Test Symposium (ETS 2015), pp. 1-2
05/2015
46 Global Transformation-Based Optimization of Threshold Logic Circuits
Proc. Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI) 2015, To Appear, March 2015.
03/2015
47 An Efficient Calculation Method for Reliability Analysis of Logic Circuits
Proc. Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI) 2015, To Appear, March 2015.
03/2015
48 Graph-Covering-Based Architectural Synthesis for Programmable Digital Microfluidic Biochips
Proc. Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI) 2015, To Appear, March 2015.
03/2015
49 Evaluation of Approximate SAD Circuits with Error Compensation
Proc. Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI) 2015, To Appear, March 2015.
03/2015
50 Single-Flux-Quantum Digital Circuit Design Using Clockless Logic Cells with a Jitter Constraint
Proc. Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI) 2015, To Appear, March 2015.
03/2015
51 Efficient Manipulation of Truth Tables on CUDA for Gate-Level Simulation
Proc. Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI) 2015, To Appear, March 2015.
03/2015
52 Quantitative Evaluations and Efficient Exploration for Optimal Partially-Programmable Circuits Generation
Proc. Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI) 2015, To Appear, March 2015.
03/2015
53 SeqBDDのメモリ使用効率化手法
2014年度情報処理学会関西支部大会
09/2014
54 組み合わせ回路におけるソフトエラー発生確率の効率的計算手法
2014年度情報処理学会関西支部大会 
09/2014
55 SeqBDDのメモリ使用効率化手法
アルゴリズムデザインコンテスト, DAシンポジウム2014
08/2014
56 SPFDによる論理関数の自由度の表現とその回路設計への応用
第27回回路とシステム軽井沢ワークショップ予稿集, pp.68-73
08/2014
57 2D Qubit Layout Optimization for Topological Quantum Computation
Lecture Notes in Computer Science Volume 8507, 2014, pp 176-188 (Reversible computation 2014, Jul. 2014.)
07/2014
58 Better-than-DMR Techniques for Yield Improvement
IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), p. 34
05/2014
59 Logic Integrated Optimal Pin-Count Design for Digital Microfluidic Biochips
To appear in Proc. ACM/IEEE DATE 2014, March, 2014
03/2014
60 Novel Area-Efficient Technique for Yield Improvement
the W3 Special Interest Workshop "Electronic System-Level Design towards Heterogeneous Computing"
03/28/2014
61 A Network-Flow-Based Optimal Sample Preparation Algorithm for Digital Microfluidic Biochips
VLSI設計技術研究会 VLD Excellent Student Award 記念講演
03/04/2014
62 A Network-Flow-Based Optimal Sample Preparation Algorithms for Digital Microfluidic Biochips
in Proc. ACM/IEEE ASP-DAC 2014, pp. 225-230, Jan. 2014. (Best Paper Candidate)
01/2014
63 On the Error Resiliency of Combinational Logic Cells – Implications for Nano-based Digital Design
Proc. 2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing, pp. 118-119, Dec. 2013
12/2013
64 二重化よりも面積オーバーヘッドが少ない耐故障化手法
信学技報, vol. 113, no. 320, VLD2013-66, pp. 33-37
11/27/2013
65 PPCに基づく高歩留まり回路の発見的設計手法
信学技報, vol. 113, no. 320, VLD2013-65, pp. 27-32
11/27/2013
66 Digital Microfluidic Biochip向けの最適な試料生成
信学技報, vol. 113, no. 320, VLD2013-64, pp. 19-24
11/27/2013
67 可逆な素子による論理設計の研究動向(招待講演)
応用物理学会 (超伝導分科会 第48回研究会)
11/22/2013
68 A Variable-Length String Matching Circuit Based On SeqBDDs
Proc. Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI), pp. 282 - 287, Oct. 2013
10/2013
69 Qubit Arrangement Problems for Topological Quantum Computation
Proc. of AQIS’13, pp. 181-182, Aug. 2013
08/2013
70 Partially-Programmable Circuitの歩留まり向上のためのLUT最適化手法
DAシンポジウム2013, 2B-1
08/21/2013
71 可逆計算に関する研究動向(招待講演)
日本学術振興会超伝導エレクトロニクス第146委員会通信・情報処理分科会第9回研究会
07/22/2013
72 A Clique-Based Approach to Find Binding and Scheduling Result in Flow-Based Microfluidic Biochips (Invited Talk)
in Proc. of ASP-DAC'13, pp. 199-204
01/2013
73 A Redundant Wire Addition Method for Patchable Accelerator
in Proc. of The 2012 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 552-555
12/2012
74 An Optimization Problem for Topological Quantum Computation
in Proc. of IEEE ATS'12, pp. 61-66 (Invited Talk)
11/2012
75 Partially-Programmable Circuits with CAMs
デザインガイア2012, VLD2012-64, pp. 31-36
11/26/2012
76 SeqBDDにおける最長共通部分列・部分文字列アルゴリズム
平成24年度情報処理学会関西支部大会 B-04
09/21/2012
77 Circuit Optimization by Clique Finding for Topological Quantum Computation
in Proc. of AQIS’12, pp. 161-162
08/2012
78 Reconstructing Strings from Substrings with Quantum Queries
in Proc. of (SWAT 2012), pp. 388-397
07/2012
79 Qubit Order Optimization Problem for Topological Quantum Computation
TQC2012
05/2012
80 Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication
Proc. of the 9th Annual Conference on Theory and Applications of Models of Computation (TAMC2012), pp. 400-411
05/2012
81 Sequence Binary Decision Diagrams with Mapping Edges
IEICE-COMP2012-4, pp. 23--28
04/2012
82 Improved Quantum Algorithms for Reconstructing Strings from Substrings
Asian Association for Algorithms and Computation (AAAC2012)
04/2012
83 Bit Selective SAD and Its Evaluation
Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI), pp. 22-27
03/2012
84 A TMR-based Soft Error Mitigation Technique With Less Area Overhead in High-Level Synthesis
Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI), pp. 396-401
03/2012
85 High-Level Synthesis Using Partially-Programmable Resources for Yield Improvement
Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI), pp. 414-419
03/2012
86 Evaluation of Migration Methods for Island Based Parallel Genetic Algorithm on CUDA
Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI), pp. 378-383
03/2012
87 トポロジカル量子コンピュータにおける量子回路の最適化手法
電子情報通信学会関西支部学生会 第17回学生会研究発表講演会
03/09/2012
88 SeqBDDにおける最長共通部分列・部分文字列アルゴリズム
電子情報通信学会関西支部学生会 第17回学生会研究発表講演会
03/09/2012
89 On Error Tolerance and Engineering Change with Partially Programmable Circuits
ASP-DAC'12, pp. 695-700
02/2012
90 Logic level circuit optimization for topological quantum computation (Invited Talk)
Dagstuhl Seminar 11502: Design of Reversible and Quantum Circuits
12/2011
91 Logic level circuit ooptimization for topological quantum computation
in Proc. of QIT25, pp. 185-188
11/2011
92 An Efficient Algorithm for Constructing a Sequence Binary Decision Diagram Representing a Set of Reversed Sequences
IEEE International Conference on Granular Computing 2011, pp. 54-55.
11/2011
93 SAD演算回路における最適な比較ビット使用箇所およびブロックサイズの検討
情報処理学会関西支部支部大会, Sep. 2011
09/2011
94 Quantum Query Complexity of Hamming Distance Estimation
in Proc. of AQIS’11, pp. 103-104
08/2011
95 リソースの再利用による実装面積を考慮した耐故障化高位合成手法 (in Japanese)
DAシンポジウム 2011 論文集, pp. 15-20
08/2011
96 Changing the Gate Order for Optimal LNN Conversion
Proc. of 3rd Workshop on Reversible Computation, pp. 175--186
07/05/2011
97 逆順の系列集合を表すSeqBDDの構築
電子情報通信学会技術研究報告, COMP, コンピュテーション, vol.111, no.20, pp.17-23
04/2011
98 Reconstructing Strings from Substrings with Quantum Queries
Asian Association for Algorithms and Computation (AAAC2011)
04/17/2011
99 Soft Error-Aware Scheduling in High-Level Synthesis (in English)
電子情報通信学会技術研究報告, vol.2011-SLDM-149/vol.2011-EMB-20, no.19, pp.1-6
03/2011
100 A Restricted Quantum Circuit Class for  Designing Large Quantum Circuits
The 3rd ERATO-SORST Quantum Computation and Information Workshop
03/01/2011
101 ゲート順序を考慮したLNNアーキテクチャへの変換手法
第23回量子情報技術研究会資料, QIT2010-65, pp. 125-128
11/15/2010
102 Increasing Yield Using Partially-Programmable Circuits
Proc. of Conference of Synthesis And System Integration of Mixed Information technologies (SASIMI2010), pp. 237-242 (Best Paper Award)
10/2010
103 Towards Robust Circuit Design with Low Overhead
Asia South Pacific Design Automation Workshop
09/11/2010
104 A SAT Solver Based on Quantum and Classical Random Walk
Asian Conference on Quantum Information Science 2010 (AQIS2010)
08/29/2010
105 Asymptotics of Quantum Walks on the Line with Phase Parameters
Asian Conference on Quantum Information Science 2010 (AQIS2010)
08/29/2010
106 Synthesis of Semi-Classical Quantum Circuits
Proc. of 2nd Workshop on Reversible Computation, pp. 93-99
07/03/2010
107 Fast Equivalence-checking for Quantum Circuits
Proc. of NANOARCH '10, pp. 23 - 28
06/16/2010
108 少品種高信頼セルを用いた高信頼回路設計手法と信頼性評価手法の提案 (SLDM 研究会 優秀発表学生賞受賞)
組込み技術とネットワークに関するワークショップ ETNET2010
03/2010
109 Increasing Yield Using Partially-Programmable Circuits
電子情報通信学会技術研究報告,vol. 109, no. 315, pp. 125-130 (VLD2009-59)
12/2009
110 Discrete Quantum Walks on the Line with Phase Parameters
The International Conference?on Quantum Information and Technology
12/03/2009
111 Quantum Communication Protocols with Public Coins
IPSJ SIG Technical Reports 2009-AL-126(6), 1-7
09/15/2009
112 Adaptive Equivalence-checking for Quantum Circuits
Proc. of Reed-Muller Workshop 2009, pp. 97-106
05/24/2009
113 An Efficient Method to Convert Arbitrary Quantum Circuits to Ones on a Linear Nearest Neighbor Architecture
Proc. of the Third International Conference on Quantum, Nano and Micro Technologiesv (ICQNM 2009), pp. 26-33
02/02/2009
114 Average/Worst-Case Gap of Quantum Query Complexities
The Twelfth Workshop on Quantum Information Processing (QIP2009)
01/14/2009
115 A Functional Unit with Small Variety of Highly Reliable Cells
Proc. of 14th Pacific Rim International Symposium on Dependable Computing (PRDC’08), pp. 353-354
12/2008
116 Quantum Query Complexity of Boolean Functions with Small On-Sets
Proc. of the 19th International Symposium on Algorithms and Computation (ISAAC 2008), pp. 907-918
12/17/2008
117 Quantum Query Complexity of Boolean Functions with Small On-Sets
QIT19
11/20/2008
118 An Efficient Method to Convert Arbitrary Quantum Circuits to Ones on a Linear Nearest Neighbor Architecture
QIT19
11/20/2008
119 量子計算の並列シミュレーションにおける通信量削減手法
SWoPP2008
08/06/2008
120 An Efficient Verification of Quantum Circuits under a Practical Restriction
Proc. of IEEE 8th International Conference on Computer and Information Technology (CIT 2008), pp. 873-879
07/08/2008
121 Polynomial-Time Construction of Linear Network Coding
L. Aceto et al. (Eds.): ICALP 2008, Part I, LNCS 5125, pp. 271-282
07/07/2008
122 Multi-Party Quantum Communication Complexity with Routed Messages
Proc. of 14th Annual International Computing and Combinatorics Conference (COCOON 2008), LNCS 5092 (2008), pp. 180-190
06/27/2008
123 Equivalence-checking for Reversible Circuits
IEEE International Workshop on Logic Synthesis (IWLS 2008), pp. 51-58
06/04/2008
124 並列量子計算シミュレータにおける通信量削減手法の提案
第18回量子情報技術研究会
05/22/2008
125 線形ネットワーク符号の構成とその多項式時間アルゴリズム
(招待)第21回回路とシステム軽井沢ワークショップ, pp. 665-670
04/2008
126 An almost optimal quantum string sealing protocol and its security analysis
In Proc. of the First AAAC (Asian Association of Algorithms and Computation) Annual Meeting. AAAC, 2008
04/26/2008
127 A quantum secure direct communication protocol for sending a quantum state and its security analysis
The 2008 Symposium on Cryptography and Information Security (SCIS2008)
01/23/2008
128 Quantum Network Coding
Proc. of the 24th International Symposium on Theoretical Aspects of Computer Science (STACS 2007), W. Thomas and P. Weil (Eds.), Lecture Notes in Computer Science, Volume 4393, Springer-Verlag, pp. 610-621, 2007.
2007
129 Tight Bounds on Information Gains in Quantum Sealing Protocols
Workshop on Quantum Information Processing 2007
2007
130 A Quantum Secure Direct Communication Protocol for Sending a Quantum State and Its Security Analysis
Workshop on Quantum Information Processing 2007
2007
131 Quantum Network Coding for General Graphs
Workshop on Quantum Information Processing 2007
2007
132 Quantum Random Access Coding using Multiple Qubits
Workshop on Quantum Information Processing 2007
2007
133 Unbounded-Error One-Way Classical and Quantum Communication Complexity
L. Arge et al. (Eds.): ICALP 2007, LNCS 4596, pp. 110-121
2007
134 A quantum secure direct communication protocol for sending a quantum state and its security analysis
In Proc. of the 6th WSEAS International Conference on Information Security and Privacy (ISP’07), pp. 91-97
12/2007
135 An Information-Theoretic Security Analysis of Quantum String Sealing
In Proc. of the 6th WSEAS International Conference on Information Security and Privacy (ISP’07), pp. 30-35
12/2007
136 Unbounded-Error Classical and Quantum Communication Complexity
Workshop on Quantum Information Processing 2008
12/21/2007
137 Synthesis of quantum circuits for d-level systems using KAK decomposition
Workshop on Quantum Information Processing 2008
12/18/2007
138 Fidelity-Efficient Quantum Network Coding
Workshop on Quantum Information Processing 2008
12/18/2007
139 Unbounded-error classical and quantum communication complexity
Proc. of 18th International Symposium on Algorithms and Computation (ISAAC2007), Lecture Notes in Computer Science 4835, pp. 100-111
12/17/2007
140 An analysis of quantum communication complexity depending on network topologies
第17回量子情報技術研究会, QIT2007-83, pp. 150–153
11/22/2007
141 A Practical Framework to Utilize Quantum Search
Proc. of the 2007 IEEE Congress on Evolutionary Computation (CEC2007)
09/28/2007
142 Communication Complexity by Arrangement Argument
4th Central European Quantum Information Processing Workshop
07/2007
143 非有界誤り一方向量子および古典通信計算量
QIT2007-26, pp. 106-111
05/18/2007
144 A hardware SAT solver using non-chronological backtracking and clause recording without overheads
In Proc. of 3rd International Workshop on Applied Reconfigurable Computing (ARC2007), pp.343-349
03/2007
145 Quantum Network Coding
Workshop on Quantum Information Processing 2006 (Talk).
2006
146 A Transduction-based Framework to Synthesize RSFQ Circuits
Proc. of Asia and South Pacific Design Automation Conference 2006 (ASP-DAC 2006), pp. 266-272, Jan. 2006.
2006
147 Quantum Communication Complexity for the Distinctness Function on a Ring
Workshop on Theory of Quantum Computation, Communication and Cryptography 2006 (TQC 2006), pp. 10-11, Feb. 2006.
2006
148 Online task placement for partially reconfigurable FPGAs using I/O routing information
Proc. of Conference of Synthesis And System Integration of Mixed Information technologies (SASIMI2006), pp. 342-349, April 2006.
2006
149 (4,1)-Quantum Random Access Coding Does Not Exist
Proc. of the 2006 IEEE International Symposium on Information Theory (ISIT2006), pp. 446-450, Jul. 2006.
2006
150 Improved Algorithms for Quantum Identification of Boolean Oracles
Prof. of the 10th Scandinavian Workshop on Algorithm Theory (SWAT 2006), Lecture Notes in Computer Science 4059, pp. 280-291, 2006.
2006
151 Robust quantum algorithms with e-biased oracles
Proc. of 12th Annual International Computing and Combinatorics Conference (COCOON 2006), LNCS 4112 (2006), pp. 116-125.
2006
152 (4,1)-Quantum Random Access Coding Does Not Exist ? One qubit is not enough to recover one of four bits ?
Proc. of Asian Conference on Quantum Information Science 2006 (AQIS 2006), pp. 188-189, Sep. 2006.
2006
153 An Efficient Approximation of SU(d) Using Decomposition
Proc. of Asian Conference on Quantum Information Science 2006 (AQIS 2006), pp. 147-148, Sep. 2006.
2006
154 Quantum Secure Direct Communication Protocols for Sending a Quantum State
Proc. of 2006 International Symposium on Information Theory and its Applications (ISITA2006), Seoul, Korea (CD-ROM), Oct. 2006.
2006
155 A New Approach to Online FPGA Placement
Proc. of Conference of Information Science and Systems, Princeton, NJ, CD-ROM, March 2006.
2006
156 How to Utilize Grover Search in General Programming
14th International Laser Physics Workshop (Laser physics, Vol. 16, No. 4, pp. 1-5)
2006
157 Quantum Protocol for the List-nonequality Function
Workshop on Quantum Information Processing 2005
2005
158 Robust Quantum Algorithms for Oracle Identification
Workshop on Quantum Information Processing 2005
2005
159 Event-Oriented Computing with Reconfigurable Platform
Proc. of Asia and South Pacific Design Automation Conference 2005 (ASP-DAC 2005), pp. 1248-1251, Jan. 2005.
2005
160 Reconfigurable 1-Bit Processor Array with Reduced Wiring Area
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA 2005), pp. 225-231, June 2005.
2005
161 A Design Method for Large-scaled Quantum Circuits
COE workshop for SoC Design Technology and Automation, p1-7
09/2005
162 Quantum Oracle Computation with and without Noises
The Seventh Workshop on Quantum Information Processing, Waterloo, Canada, Jan. 14-19, 2004.
2004
163 SPFD-based One-to-Many Rewiring
Proc. of International Symposium on Field Programmable Gate Arrays (FPGA 2004), p. 250.
2004
164 Quantum Pushdown Automata that can Deterministically Solve a Certain Problem
International Symposium on Mesoscopic Superconductivity and Spintronics (MS+S2004), p. 16, March 2004.
2004
165 Quantum identification of boolean oracles
Proc. of the 21th International Symposium on Theoretical Aspects of Computer Science (STACS 2004), Diekert, Volker and Habib, Michel (Eds.), Lecture Notes in Computer Science, Volume 2996, Springer-Verlag, pp. 105-116, 2004.
2004
166 SPFD-based One-to-Many Rewiring (OMR) for Delay Reduction of LUT-based FPGA Circuits
Proc. of GLS-VLSI 2004, pp. 348-353, Apr. 2004.
2004
167 Toward a Practical Environment for Quantum Programming
Proc. of Asia-Pacific Conference on Quantum Information Science, pp. 133-141, Dec. 2004.
2004
168 Quantum Query Complexity of Biased Oracles
Workshop on ERATO Quantum Information Science 2003, pp. 33-34, Sep. 2003
2003
169 Explicit Implementation of Quantum Computers on a Unidirectional Periodic Structure
Carrier Interactions and Spintronics in Nanostructures (CISN 2003), 2003.
2003
170 Quantum sampling for balanced allocations
Proc. of 9th Annual International Computing and Combinatorics Conference (COCOON 2003), LNCS 2697 (2003), pp. 304-318.
2003
171 Transformation Rules for Designing CNOTbased Quantum Circuits
Proc. of Design Automation Conference 2002, pp. 419-424, Jun. 2002.
2002
172 Quantum query complexity and the number of inverted states
Workshop on ERATO Quantum Information Science 2002, pp. 79-80, Sep. 2002.
2002
173 Explicit implementation of quantum circuits on unidirectional periodic structure
Workshop on ERATO Quantum Information Science 2002, pp. 83-84, Sep. 2002.
2002
174 Quantum complexity of noisy IP query
Workshop on ERATO Quantum Information Science 2002, pp. 77-78, Sep. 2002.
2002
175 量子サンプリングとその応用
(招待)電子情報通信学会2002年総合大会, TD-1-3
03/2002
176 A Complete Set of Transformation Rules for Quantum Boolean Circuits with CNOT gates
Workshop on ERATO Quantum Information Science 2001, p. 22, Sep. 2001.
2001
177 New algorithms for factoring and discrete logarithm with NMR quantum computers
Workshop on ERATO Quantum Information Science 2001, p. 52, Sep. 2001.
2001
178 SPFD: A Method to Express Functional Flexibility
Booklet of 10th International Workshops on Post-Binary ULSI Systems (ULSI 2001), pp. 19-24
05/2001
179 An Efficient Framework of Using Various Decomposition Methods to Synthesize LUT Networks and Its Evaluation
Proc. of Asia and South Pacific Design Automation Conference 2000 (ASP-DAC 2000), pp. 253-258, Jan. 2000.
2000
180 A Boolean Division Algorithm for Implicit Cube Set Representations
Proc. of the 9th International Workshop on Synthesis And System Integration of MIxed Technologies (SASIMI 2000), pp. 279-283, Apr. 2000.
2000
181 A Layout Driven Logic Decomposition Model
IEEE International Workshop on Logic Synthesis (IWLS 2000), pp. 111-115, May 2000.
2000
182 An Integrated Approach for Synthesizing LUT Networks
Proc. of the 9th Great Lakes Symposium on VLSI (GLS-VLSI ’99), pp. 136-139, Feb. 1999.
1999
183 An Efficient Method for Generating Kernels on Implicit Cube Set Representations
the 12th Workshop on Circuits and Systems in Karuizawa, pp. 331-336, Apr. 1999 (in Japanese).
1999
184 An Efficient Method for Generating Kernels on Implicit Cube Set Representations
IEEE International Workshop on Logic Synthesis (IWLS ’99), pp. 260-263, June 1999.
1999
185 New Methods to Find Optimal Non-Disjoint Bi-Decompositions
Proc. of Asia and South Pacific Design Automation Conference 1998 (ASP-DAC ’98), pp. 59-68, Feb. 1998.
1998
186 Restructuring Logic Representations with Easily Detectable Simple Disjunctive Decompositions
Proc. Design, Automation and Test in Europe Conf. (DATE ’98), pp. 755-759, Feb. 1998.
1998
187 Efficient Methods for a Simple Disjoint Decomposition and a Non-Disjoint Bi-Decomposition
the 7th International Workshop on Post-Binary ULSI Systems, pp. 34-37, May 1998.
1998
188 Restricted Simple Disjunctive Decompositions Based on Grouping Symmetric Variables
Proc. the Seventh Great Lakes Symposium on VLSI (GLS-VLSI ’97), pp. 39-44, Mar. 1997.
1997
189 A New Method to Express Functional Permissibilities for LUT based FPGAs and Its Applications
Proc. Int’l Conf. Computer-Aided Design (ICCAD ’96), pp. 254-261, Nov. 1996.
1996
190 Optimization Methods for Lookup-Table-Based FPGAs Using Transduction Method
Proc. of Asia and South Pacific Design Automation Conference 1995 (ASP-DAC ’95), pp. 353-356, Aug. 1995.
1995