研究者学術情報データベース

オグラ　タケシ
小倉　武
OGURA Takeshi

所属理工学部電子情報工学科

職名講師

論文
1.	2016/11	Method of video transcoding from MPEG-2 to HEVC with picture structure information │ J. of Signal Processing │ 20 (6),283-290 (共著)
2.	2016/07	FPGA Implementation and Evaluation of Ternary Content Addressable Memory with Individuality │ J. of Signal Processing │ 20 (4),137-140 (共著)
3.	2016/04	An Optimal CAM-based Separated BTB for a Superscalar Processor │ Int'l J. of Computer Theory and Engineering │ 8 (2),122-128 (共著)
4.	2016/01	Adaptive Multi-Directional Max-Plus Algebra-based Morphological Wavelet Transform │ J. of Signal Processing │ 20 (1),9-19 (共著)
5.	2015/07	Digital Image Forensics Using Morphological Pattern Spectrum │ J. of Signal Processing │ 19 (4),159-162 (共著)
6.	2015/04	ハードウェアトロイ検証環境の開発と暗号回路を用いた実装及び評価 │ 電子情報通信学会論文誌 A │ J98-A (4),313-326 (共著)
7.	2014/07	A Method Using CA-Based Pixel Level Snakes for Multiple Contour Expansion │ J. of Signal Processing │ 18 (4),221-224 (共著)
8.	2014/03	Development of Compression Tolerable and Highly Implementable Watermarking Method for Mobile Devices │ IEICE Trans. Information and Systems │ E97-D (3),593-596 (共著)
9.	2013/10	Morphological pattern spectrum and block cipher processing based image-manipulation detection │ Nonlinear Theory and Its Applications, IEICE │ 4 (4),400-418 (共著)
10.	2013/07	Morphological Pattern Spectrum-Based Objects Detection for Protecting Privacy │ J. of Signal Processing │ 17 (4),155-158 (共著)
11.	2012/11	Max-Plus Algebra-Based Morphological Wavelet Transform Watermarking for Highly-Parallel Processing with Mobile Embedded Processor," J. of Signal Processing │ J. of Signal Processing │ 16 (6),547-556 (共著)
12.	2011/11	Decomposition/Reconstruction Acceleration of Max-Plus Algebra-Based Morphological Wavelet Transform with Massive-Parallel SIMD Matrix Mobile Processor │ J. of Signal Processing │ 15 (6),425-434 (共著)
13.	2010/07	Morphological Wavelet Transform using Directional Sampling Windows on Cellular Hardware Platform │ J. of Signal Processing │ 14 (4),261-264 (共著)
14.	2009/11	Hardware Annealing on Discrete-Time Cellular Neural Network for Object Extraction │ J. of Signal Processing │ 13 (6),463-468 (共著)
15.	2009/11	Real-Time DT-CNN Processing Using Highly Parallel 2-D Cellular Automata: CAM**2 │ J. of Signal Processing │ 13 (6),531-537 (共著)
16.	2008/07	Probabilistic Information processing by DT-CNN on CAM2 with Mean Field Approximation │ J. of Signal Processing │ 12 (4),279-282 (共著)
17.	2002/09	A parallel algorithm for real-time object recognition │ Pattern Recognition │ 35 (9) (共著)
18.	2002/02	Accurate and Real-time Image Processing on a new PC-compatible Board │ Real-Time Imaging │ 8 (1) (共著)
19.	2001/06	マルチメディア用大規模システムLSIのコンカレントデザイン環境 │ 電子情報通信学会論文誌, D-I │ J84-D-I (6) (共著)
20.	2001/04	On-chip Multimedia Real-time OS and its MPEG-2 Applications │ IEICE Trans. Inf. & Syst. │ E84-D (4) (共著)
21.	2001/03	Motion Estimation and Compensation Hardware Architecture for a Scene-Adaptive Algorithm on a Single-chip MPEG2 Video Encoder │ IEICE Trans. Inf. &Syst. │ E84-D (3) (共著)
22.	2000/12	On using CAM Concept for Parametric Curve Extraction │ IEEE Trans. Image Processing │ 9 (12) (共著)
23.	2000/11	シングルチップMPEG-2ビデオエンコーダと応用システム │ NTT R&D │ 49 (11) (共著)
24.	2000/08	Real-time CAM-based Hough Transform Algorithm and Its Performance Evaluation │ J. of Machine Vision and Applications │ 12 (2) (共著)
25.	2000/05	Hough Transform Algorithm for Three-Dimensional Segment Extraction and its parallel Hardware Implementation │ Computer Vision and Image Understanding │ 78 (2) (共著)
26.	2000/04	A Fully-parallel 1-Mb CAM LSI for Real-time Pixel-parallel Image Processing │ IEEE J. Solid-State Circuits │ 35 (4) (共著)
27.	2000/02	Three-layer Cooperative Architecture for MPEG-2 Video Encoder LSI │ IEICE Trans. Electronics │ E83-C (2) (共著)